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BR34E02FVT-W, BR34E02NUX-W
Technical Note
● I/O Circuit
○ SDA Pin Pull-up Resistor
A pull-up resistor is required because SDA is an NMOS open drain. Determine the resistor value of (R PU ) by considering
the VIL and IL, and VOL-IOL characteristics. If a large R PU is chosen, the clock frequency needs to be slow. A smaller
R PU will result in a larger operating current.
○ Maximum R PU
The maximum of R PU can be determined by the following factors.
① The SDA rise time determined by R PU and the capacitance of the BUS line(CBUS) must be less than tR.
In addition, all other timings must be kept within the AC specifications.
② When the SDA BUS is High, the voltage A at the SDA BUS is determined from the total input leakage(IL) of all
devices connected to the BUS. RPU must be higher than the input High level of the microcontroller and the device,
including a noise margin 0.2V CC .
V CC -I L R PU -0.2 V CC ≧ VIH
Microcontroller
BR34E02
∴
R PU ≦
0.8V CC -V IH
IL
R PU
A
SDA PIN
Examples: When V CC =3V, IL=10μA, VIH=0.7 V CC
According to ②
IL
IL
10x10
R PU
≦
0.8x3-0.7x3
-6
≦
300 [k ? ]
THE CAPACITANCE OF BUS
LINE (CBUS)COMPUTER
Fig.43 I/O Circuit
○ Minimum R PU
The minimum value of R PU is determined by following factors.
① Meets the condition that V OLMAX =0.4V, I OLMAX =3mA when the output is Low.
V CC -V OL
R PU
≦ I OL
∴
R PU ≧
V CC -V OL
I OL
② V OLMAX =0.4V must be lower than the input Low level of the microcontroller and the EEPROMincluding the
recommended noise margin of 0.1V CC .
V OLMAX ≦ VIL-0.1 V CC
Examples: V CC =3V, VOL=0.4V, IOL=3mA, the VIL of the controller and the EEPROM is VIL=0.3V CC , According to ①
R PU
≧
3-0.4
3×10 -3
≧ 867 ［ ? ］
and
and
VOL=0.4 ［ V ］
VIL=0.3 × 3
=0.9 ［ V ］
o that condition ② is met
○ SCL Pin Pull-up Resistor
When SCL is controlled by the CMOS output the pull-up resistor at SCL is not required.
However, should SCL be set to Hi-Z, connection of a pull-up resistor between SCL and V CC is recommended.
Several k ? are recommended for the pull-up resistor in order to drive the output port of the microcontroller.
● A0, A1, A2, WP Pin connections
○ Device Address Pin (A0, A1, A2) connections
The status of the device address pins is compared with the device address sent by the Master. One of the devices that is
connected to the identical BUS is selected. Pull up or down these pins or connect them to V CC or GND. Pins that are not
used as device address (N.C.Pins) may be High, Low, or Hi-Z.
WP Pin connection
The WP input allows or prohibits write operations. When WP is High, only Read is available and Write to all address is
prohibited. Both Read and Write are available when WP is Low.
In the event that the device is used as a ROM, it is recommended that the WP input be pulled up or connected to V CC .
When both READ and WRITE are operated, the WP input must be pulled down or connected to GND or controlled.
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? 2009 ROHM Co., Ltd. All rights reserved.
13/18
2009.09 - Rev.B
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